Verification Engineer Verilog jobs - Palo Alto, CA

Viewing 1 - 10 of 225 jobs

• ASIC Design Verification Engineer (4494)

  QLogic - Mountain View, CA

  *Regression Management *Object Oriented programming *System Verilog Verification using a framework such as OVM, VMM, or ... based on verification plans *Coding using an HDL such as Verilog or SystemVerilog *Excellent written & verbal...

  2 days ago from WomensCareerChannel.com

• Principal Verification Engineer

  LSI - San Jose, CA

  Must have experience in advanced verification methodologies including functional coverage using System Verilog and be ab ... advanced verification methodologies into the read channel verification flow. Experience with System Verilog and...

  23 hours ago from America's Job Exchange

• Electrical Engineer (Design Engineer)

  Soft Machines - Santa Clara, CA

  Inc. currently has a position open for an Electrical Engineer (Design Engineer) at our Santa Clara, CA ... physics and fabrication process8.Programming skills with Verilog, scripting language.Experience may be gained...

  7 days ago from Jobvertise

• Verification Engineer

  Intel - Santa Clara, CA

  Title: Verification Engineer Location: USA-California, Santa Clara Other Locations: USA-California, Folsom, USA-Arizona, ... with all Validation Disciplines (Arch, Emulation, System Verilog, Software) - 3 years of working knowledge of VCS,...

  2 days ago from Job.com

• FPGA Design Engineer 2 3

  Boeing - Pleasanton, CA

  Experience with integrating 3rd Party VHDL/Verilog IP Cores is desired. Proficiency in the use of the following applica ... Experience writing testbeds to exercise VHDL/Verilog designs is desired...

  2 days ago from Boeing

• Principal Verification Engineer

  LSI LOGIC - San Jose, CA

  Requisition Number: 13-10831 Job Title: Principal Verification Engineer Country: USA State/Province/County: California C ... advanced verification methodologies into the read channel verification flow. Experience with System Verilog and...

  1 day ago from Beyond

• SOC Design Engineers (2)

  Ee-recruiters - Santa Clara, CA

  and RTL design is required. -Knowledge of ASIC design, chip verification and test, and system software is required. ... in simulation testbenches, bfm development, and design verification -Experience in logic synthesis and timing...

  1 day ago from ZipRecruiter

• ASIC FPGA Verification Engineer

  Kelly Services - Santa Clara, CA

  Job Description: ASIC/FPGA Verification Engineer Contract Duration: 6 Months to 1 Year Detailed Description - The ideal ... and formal verification methods. - Experience as a verification architect, establishing the verification...

  6 days ago from JobHat

• FPGA Design Engineer 3 4

  Boeing - Pleasanton, CA

  Experience writing testbeds to exercise VHDL/Verilog designs is desired ... Assists others in understanding detailed drawings and specs. • Tech Verification/Validation Basic - Complete knowledge...

  3 days ago from Boeing

• ASIC Verification Engineer

  Yoh - Santa Clara, CA

  Yoh has a contract opportunity for an ASIC Verification Engineer to join our client in Santa Clara, CA. Job Overview: ... team-oriented senior networking ASIC verification engineer contractor who will be responsible for developing...

  7 days ago from Beyond