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Tensilica jobs - Sunnyvale, CA

Viewing 1 - 7 of 12 jobs

  • Principal Design Verification Engineer

    Cadence Design Systems - San Jose, CA

    Jose, CA Functional Area:Engineering Cost Center:Tensilica India R&D Position Type:Regular Education ... * Apply withLinkedIn Position Description Cadence’s IPG Tensilica processors are based on the proven Xtensa...

    30+ days ago from Cadence Design Systems, Inc.

  • Imaging and Vision Multiprocessor Architect

    Cadence Design Systems - San Jose, CA

    Jose, CA Functional Area:Engineering Cost Center:Tensilica US R&D Position Type:Regular Education ... detailed product deliverables for an MP subsystem on the Tensilica/Cadence imaging and vision architecture. This...

    30+ days ago from Cadence Design Systems, Inc.

  • Principal Design Engineer - Datapath Design

    Cadence Design Systems - San Jose, CA

    of DSP instructions and specialized DSP hardware using Tensilica processor description languages (TIE), and tools and flows. This includes the use of standard EDA tools and flows to ensure that the DSPs meet timing, area and power goals.

    30+ days ago from Cadence Design Systems, Inc.

  • Sr. DSP Processor Datapath Architect

    Cadence Design Systems - San Jose, CA

    Jose, CA Functional Area:Engineering Cost Center:Tensilica US R&D Position Type:Regular Education ... to meet specific data-plane performance targets. Tensilica’s processors power top tier semiconductor companies,...

    30+ days ago from Cadence Design Systems, Inc.

  • Sr. Android Software Engineer

    Cadence Design Systems - San Jose, CA

    low-power audio offload software framework for Tensilica HiFi audio DSPs for Android and other platforms. Develop methods and participate in standards for routing compressed audio (deep tunneling) and other offload processing for ultra low...

    10 days ago from Cadence Design Systems, Inc.

  • Sr Principal Program Manager , IP , San Jose / Austin

    Cadence Design Systems - San Jose, CA

    faster. The Cadence IP Portfolio includes silicon-proven Tensilica® IP cores, analog PHY interfaces, standards-based IP cores, verification IP, and other solutions as well as customization services for current and emerging industry...

    23 days ago from Cadence Design Systems, Inc.

  • Senior Principal Design Engineer - Datapath Design

    Cadence Design Systems - San Jose, CA

    Jose, CA Functional Area:Engineering Cost Center:Tensilica US R&D Position Type:Regular Education ... specific data-plane performance targets. Tensilica’s processors power top tier semiconductor companies, innovative...

    30+ days ago from Cadence Design Systems, Inc.

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