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Tensilica jobs - Santa Clara, CA

Viewing 1 - 7 of 10 jobs

  • Principal Design Verification Engineer

    Cadence Design Systems - San Jose, CA

    Jose, CA Functional Area:Engineering Cost Center:Tensilica India R&D Position Type:Regular Education ... * Apply withLinkedIn Position Description Cadence’s IPG Tensilica processors are based on the proven Xtensa...

    25 days ago from Cadence Design Systems, Inc.

  • Imaging and Vision Multiprocessor Architect

    Cadence Design Systems - San Jose, CA

    Jose, CA Functional Area:Engineering Cost Center:Tensilica US R&D Position Type:Regular Education ... detailed product deliverables for an MP subsystem on the Tensilica/Cadence imaging and vision architecture. This...

    30+ days ago from Cadence Design Systems, Inc.

  • Lead Design Engineer SJ

    Cadence Design Systems - San Jose, CA

    with the baseband team to define how Cadence’s Tensilica’s DSP, multi-core and configurable processor technologies support baseband and multimedia systems designs. Define processor features and EDA tools required for the next generation...

    7 days ago from Cadence Design Systems, Inc.

  • Sr. DSP Processor Datapath Architect

    Cadence Design Systems - San Jose, CA

    Jose, CA Functional Area:Engineering Cost Center:Tensilica US R&D Position Type:Regular Education ... to meet specific data-plane performance targets. Tensilica’s processors power top tier semiconductor companies,...

    10 days ago from Cadence Design Systems, Inc.

  • Sr Principal Program Manager , IP , San Jose / Austin

    Cadence Design Systems - San Jose, CA

    faster. The Cadence IP Portfolio includes silicon-proven Tensilica® IP cores, analog PHY interfaces, standards-based IP cores, verification IP, and other solutions as well as customization services for current and emerging industry...

    25 minutes ago from Cadence Design Systems, Inc.

  • Principal Design Engineer - Datapath Design

    Cadence Design Systems - San Jose, CA

    Jose, CA Functional Area:Engineering Cost Center:Tensilica US R&D Position Type:Regular Education ... of DSP instructions and specialized DSP hardware using Tensilica processor description languages (TIE), and tools...

    30+ days ago from Cadence Design Systems, Inc.

  • Senior Principal Design Engineer - Datapath Design

    Cadence Design Systems - San Jose, CA

    The automated design tools behind all of Tensilica’s application-specific processor cores enable rapid customization ... specific data-plane performance targets. Tensilica’s processors power top tier semiconductor companies, innovative...

    8 days ago from Cadence Design Systems, Inc.

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