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Tensilica jobs - Mountain View, CA

Viewing 1 - 7 of 7 jobs

  • Principal Design Verification Engineer

    Cadence Design Systems - San Jose, CA

    Jose, CA Functional Area:Engineering Cost Center:Tensilica India R&D Position Type:Regular Education ... * Apply withLinkedIn Position Description Cadence’s IPG Tensilica processors are based on the proven Xtensa...

    30+ days ago from Cadence Design Systems, Inc.

  • Imaging and Vision Multiprocessor Architect

    Cadence Design Systems - San Jose, CA

    Jose, CA Functional Area:Engineering Cost Center:Tensilica US R&D Position Type:Regular Education ... detailed product deliverables for an MP subsystem on the Tensilica/Cadence imaging and vision architecture. This...

    30+ days ago from Cadence Design Systems, Inc.

  • Principal CM Engineer-Project Lead

    Cadence Design Systems - San Jose, CA

    Jose, CA Functional Area:Engineering Cost Center:Tensilica US R&D Position Type:Regular Education ... Generator in the space of automation, build and release. Tensilica has a sophisticated online system for configuring...

    30+ days ago from Cadence Design Systems, Inc.

  • Sr. DSP Processor Datapath Architect

    Cadence Design Systems - San Jose, CA

    Jose, CA Functional Area:Engineering Cost Center:Tensilica US R&D Position Type:Regular Education ... to meet specific data-plane performance targets. Tensilica’s processors power top tier semiconductor companies,...

    30+ days ago from Cadence Design Systems, Inc.

  • Principal Design Engineer - Datapath Design

    Cadence Design Systems - San Jose, CA

    Jose, CA Functional Area:Engineering Cost Center:Tensilica US R&D Position Type:Regular Education ... of DSP instructions and specialized DSP hardware using Tensilica processor description languages (TIE), and tools...

    30+ days ago from Cadence Design Systems, Inc.

  • Senior Principal Design Engineer - Datapath Design

    Cadence Design Systems - San Jose, CA

    Jose, CA Functional Area:Engineering Cost Center:Tensilica US R&D Position Type:Regular Education ... specific data-plane performance targets. Tensilica’s processors power top tier semiconductor companies, innovative...

    30+ days ago from Cadence Design Systems, Inc.

  • Sr. Android Software Engineer

    Cadence Design Systems - San Jose, CA

    Jose, CA Functional Area:Engineering Cost Center:Tensilica US R&D Position Type:Regular Education ... low-power audio offload software framework for Tensilica HiFi audio DSPs for Android and other platforms. *...

    30+ days ago from Cadence Design Systems, Inc.