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Engineer, Senior Asic Design jobs

Viewing 31 - 40 of 819 jobs

  • Senior ASIC/FPGA Design Engineer

    Firstpass Engineering - Phoenix, AZ

    Find out more at www.firstpasseng.com Job Description: Senior FPGA/ASIC Design Engineer The ideal candidate will have a ... basic verification, synthesis, timing closure of the design. • Solid understanding of the digital design pitfalls of...

    4 days ago from ZipRecruiter

  • Sr. ASIC Design Engineer (Timing Verification & Signoff)

    Hillsboro, OR

    include but are not limited to: Develop robust ASIC design and verification methodology to meet PV ... methodology and guide timing convergence aspects for ASIC design blocks. Provide sign-off support to SoC projects.

    6 days ago from Oregon Employment Department

  • Engineer, Senior ASIC Design Verification

    Marvell Technology Group - Corvallis, OR

    We are looking for an ASIC design & verification engineer who will contribute to all phases of ASIC, Imaging ... include all phases of development including planning, design, verification, implementation, test, qualification, and...

    30+ days ago from Marvell Technology Group

  • Engineer, Senior ASIC Design Verification

    Results Center - Corvallis, OR

    VHDL, and SystemVerilog • Demonstrated skills in ASIC/FPGA design, simulation and synthesis • Excellent verbal and ... for an ASIC design & verification engineer who will contribute to all phases of ASIC, Imaging & Consumer...

    30+ days ago from The Results Center

  • Senior Engineer, ASIC Design

    Marvell - Santa Clara, CA

    Write design documentation, implement design in VHDL or Verilog HDL, and collaborate with team members to perform design ... Utilize experience with FPGA design flow to realize designs in FPGA evaluation platform, and verify the design in a real...

    30+ days ago from Marvell

  • Sr. ASIC Design Engineer (Timing Verification & Signoff)

    Intel - Hillsboro, OR

    include but are not limited to: Develop robust ASIC design and verification methodology to meet PV ... methodology and guide timing convergence aspects for ASIC design blocks. Provide sign-off support to SoC projects.

    6 days ago from Intel

  • Senior or Lead Engineer - ASIC Physical Design

    Ericsson - San Jose, CA

    Req ID: 23950 Tech Lead Engineer - ASIC Physical Design Smart Services Router San Jose, CA, USA With a backplane ... a bright, self-motivated individual who excels in ASIC physical design. The successful candidate will be...

    3 days ago from Ericsson

  • Sr ASIC Design Engineer (Circuit Integration) Job

    Intel - Beaverton, OR

    Sr ASIC Design Engineer (Circuit Integration) - 737262 Description Job Description: The Intel Custom Foundry group ... described below to join its ASIC Design Services Physical Design Methodology team to build the industry's next...

    25 days ago from Intel

  • Senior ASIC Design Engineer

    Sustainable Recruitment Concepts - Irvine, CA

    Senior ASIC Design Engineer Description: Work closely with the design, algorithm, and system teams using advance tools ... The qualified candidate should possess strong VLSI design techniques including RTL/logic design, behavioral and gate lev...

    30+ days ago from Sustainable Recruitment Concepts

  • Senior ASIC Physical Design Engineer

    Connetics - San Jose, CA

    and Northern),Colorado,MN as an ASIC physical design engineer - Working as part of a highly-talented ASIC ... understanding of physical design reuse. - Experience with ASIC test methodologies including scan-insertion, ATPG,...

    15 days ago from ZipRecruiter

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