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Engineer, Senior Asic Design jobs - Santa Clara, CA

Viewing 1 - 10 of 314 jobs

  • Sr Applications Engineer

    Cadence Design Systems - San Jose, CA

    Requirements: * Design experience should include ASIC design using industry-standard hardware description ... Strong group presentation skills * 1 year minimum in ASIC Design Implementation , Synthesis, Design Constraints,...

    30+ days ago from Cadence Design Systems, Inc

  • Principal Hardware Engineer - High Speed Digital Design & Development

    Emulex - San Jose, CA

    You will take projects from initial design concept through to board-level bring up, debugging, validation and ASIC I/O v ... and off site teams to drive new ASIC reference design and IO validation. • Hardware architecture and design. Software...

    3 days ago from Emulex Corporation

  • Senior ASIC Physical Design Engineer

    Connetics - San Jose, CA

    and Northern),Colorado,MN as an ASIC physical design engineer - Working as part of a highly-talented ASIC ... understanding of physical design reuse. - Experience with ASIC test methodologies including scan-insertion, ATPG,...

    18 days ago from ZipRecruiter

  • ASIC Designers (Staff, Sr Staff, Principal, Sr. Mgr, or Architects)

    SK Hynix Memory Solutions - San Jose, CA

    ASIC design Hands-on experience in all aspects of RTL design flow from specification/architecture definition to design ... design activities, including architecture definition, design specification, design flow development, logic design and...

    7 days ago from ZipRecruiter

  • Senior Electrical Engineer

    Procept Biorobotics - Redwood City, CA

    report directly to the Senior Director of R&D. The Senior Electrical Engineer will be responsible for developing ... design, including mechanical and software design and manufacturability. Document the electrical design with released...

    18 days ago from ZipRecruiter

  • Engineer, Senior ASIC Design

    Marvell Technology Group - Santa Clara, CA

    The candidate will be responsible for design and verification of high-speed and low power digital circuits using ... include architecture specification, multi-clock domain RTL design and verification, synthesis, static timing analysis,...

    30+ days ago from Marvell Technology Group

  • Engineer, Senior ASIC Design

    Results Center - Santa Clara, CA

    Looking for entry level engineer who can help following area. Synthesis/STA (EDA tool DC/PrimeTime/PTPX/…) · Die size estimation · Should understand each command and constraints · Review the un-clocked F/Fs and communicate with designer in...

    30+ days ago from The Results Center

  • Engineer, Senior ASIC Design

    Marvell - Santa Clara, CA

    Looking for entry level engineer who can help following area. Synthesis/STA (EDA tool DC/PrimeTime/PTPX/…) · Die size estimation · Should understand each command and constraints · Review the un-clocked F/Fs and communicate with designer in...

    30+ days ago from Marvell

  • Sr. Engineer, ASIC Design/Verification

    Sustainable Recruitment Concepts - San Jose, CA

    Engineer, ASIC Design/Verification RESPONSIBILITIES ASIC implementation of H.265/HEVC video codec blocks Micro-architect ... design and documentation RTL coding, simulation and ASIC block debug Test plan development, direct and/or random...

    30+ days ago from Sustainable Recruitment Concepts

  • SR. ASIC CAD FLOW ENGINEER - FPGA PROTOTYPING

    NVIDIA - Santa Clara, CA

    SR. ASIC CAD FLOW ENGINEER - FPGA PROTOTYPING #1714946 As a Sr CAD Flow Engineer, you will design, implement, and ... excellent programming skill. If you are a hard working engineer and enjoy the challenges, then this high visibility...

    30+ days ago from Nvidia

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