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Dft Logic Design Engineer jobs - San Jose, CA

Viewing 1 - 10 of 99 jobs

  • Solutions Architect - AE

    Cadence Design Systems - San Jose, CA

    all facets of CDNS technology. Good understanding of Logic Synthesis, timing constraints, DFT requirements ... Good experience using EDA tools in the logic design and synthesis space Excellent bottleneck analysis skills...

    30+ days ago from Cadence Design Systems, Inc.

  • Project Management Engineer - Physical Design

    Cyient - San Jose, CA

    STA, cleaning up constraints working with logic design and DFT teams. This position will be ... Good Logic Design basics Expertise in RTL Coding - Verilog/VHDL Strong Logic and Physical Synthesis skills Expertise on...

    18 days ago from Sologig

  • Test applications engineer

    Crossbar - Santa Clara, CA

    Job Description: As a Test Applications Engineer at Crossbar, Inc., your responsibilities include, ... 2) Develop and own new methods for Design for Test (DFT) implementations and coordinate with engineering staff...

    7 days ago from ZipRecruiter

  • Front-End Application Engineer - ICD/FED

    Cadence Design Systems - San Jose, CA

    Requirements: * Design experience should include ASIC design using industry-standard hardware description ... ASIC Design Implementation , Synthesis, Design Constraints, DFT and Deep Static Timing Analysis for a number of ASIC...

    30+ days ago from Cadence Design Systems, Inc.

  • Sr Applications Engineer

    Cadence Design Systems - San Jose, CA

    Requirements: * Design experience should include ASIC design using industry-standard hardware description ... ASIC Design Implementation , Synthesis, Design Constraints, DFT and Deep Static Timing Analysis for a number of ASIC...

    30+ days ago from Cadence Design Systems, Inc.

  • RTL Logic Design Engineer - major announcement soon

    Quantum Solution - Santa Clara, CA

    Duties include micro-architecture specification and logic design for a high-performance, low-power CPU core. The ... closure -Work with design team members across disciplines (Logic, Circuits, PD, DFT) -Meet all functional, area, power,...

    3 hours ago from Quantum Solution

  • Sr. IP Logic Design Engineer

    Intel - Santa Clara, CA

    of complex design block(s) - Responsible for the logic implementation of complex design block(s) using RTL ... **Job:** *Engineering* **Title:** *Sr. IP Logic Design Engineer* **Location:** *California, Santa Clara*...

    30+ days ago from Intel

  • Staff I DFT Design Engineer

    Broadcom - San Jose, CA

    Auto req ID 33015BR Job Posting Title Staff I DFT Design Engineer Business Unit Infrastructure and Networking Job ... challenges. As a DFT team member, you will specify, design and implement DFT technologies and methodologies,...

    15 days ago from Broadcom

  • Staff Engineer, DFT Design

    Marvell - Santa Clara, CA

    experience on DFT design and integration Hands on DFT implementation experience (BSCAN, SCAN, MBIST, JTAG, IP ... with DFT tools from Synopsys, Mentor, Syntest and Logic Vision Strong logic design and verification background solid...

    30+ days ago from Marvell

  • SoC Design Engineer

    Artech Information Systems - San Jose, CA

    You will be also involved in the timing constraint development, synthesis, DFT/Core based DFT of sub-systems, logic equi ... You will be also involved in the timing constraint development, synthesis and DFT/core based DFT of sub-systems, logic e...

    30+ days ago from Artech Information Systems LLC

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