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Dft Logic Design Engineer jobs - San Jose, CA

Viewing 1 - 10 of 102 jobs

  • Sr. IP Logic Design Engineer

    Intel - Santa Clara, CA

    of complex design block(s) - Responsible for the logic implementation of complex design block(s) using RTL ... **Job:** *Engineering* **Title:** *Sr. IP Logic Design Engineer* **Location:** *California, Santa Clara*...

    30+ days ago from Intel

  • Principal DFT Design Engineer

    Broadcom - San Jose, CA

    Auto req ID 33022BR Job Posting Title Principal DFT Design Engineer Business Unit Infrastructure and Networking Job ... challenges. As a DFT team member, you will specify, design and implement DFT technologies and methodologies,...

    18 days ago from Broadcom

  • Senior Logic Designer - break through in CPU power and performance

    Quantum Solution - Santa Clara, CA

    will include micro-architecture specification and logic design for a high-performance, low-power CPU core. As RTL ... Work with design team members across disciplines (Logic, Circuits, PD, DFT) to implement and validate physical design on...

    12 days ago from Quantum Solution

  • Staff Engineer, DFT Design

    Marvell - Santa Clara, CA

    experience on DFT design and integration Hands on DFT implementation experience (BSCAN, SCAN, MBIST, JTAG, IP ... with DFT tools from Synopsys, Mentor, Syntest and Logic Vision Strong logic design and verification background solid...

    30+ days ago from Marvell

  • Design Engineer

    Altera - San Jose, CA

    As a Design Engineer, you will be involved in the design and integration of Altera's next generation FPGA devices on ... specification and planning, micro-architecture, logic design (RTL), synthesis/STA and timing sign off, DFT/DFX...

    24 days ago from Altera Corporation

  • VLSI Design Engineer

    Sony Electronics - San Jose, CA

    a global leader in image sensors, is seeking a VLSI Design Engineer to work on next generation image sensor ... · Experience with Verilog, System-Verilog, VCS, logic analyzer, shell/Perl scripting Additional desirable skills...

    26 days ago from Sony Electronics

  • SoC Design Engineer

    Artech Information Systems - San Jose, CA

    You will be also involved in the timing constraint development, synthesis, DFT/Core based DFT of sub-systems, logic equi ... You will be also involved in the timing constraint development, synthesis and DFT/core based DFT of sub-systems, logic e...

    30+ days ago from Artech Information Systems LLC

  • ASIC Design Engineer

    Marvell Technology Group - Santa Clara, CA

    Functional and logical verification Gate-level simulations DFT and scan vector generation Static timing analysis ... Skills RTL design using Verilog or VHDL Synthesis using (Design-Compiler or equivalent) Experience with at least 3 of...

    30+ days ago from Marvell Technology Group

  • Analog Design Engineer

    Taleo Corporation UK - Santa Clara, CA

    Within SPARC design group, the mixed-signal design team builds IO clusters that use sophisticated analog and digital ... power requirements. We are seeking an experienced analog design engineer to join the existing Oracle team. In this...

    30+ days ago from Taleo Corporation UK

  • Lead DFT engineer

    Juniper Networks - Sunnyvale, CA

    Job Details About the Position: Looking for senior DFT engineer responsible for successful implementation of advanced ... DFT Compiler scan insertion • Experience in Logic Design, VHDL, Verilog RTL, verification, and static timing...

    10 days ago from Juniper Networks

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